The present invention relates to an expansive circuit diagram information generator for use in a computer system to generate expansive circuit diagram information from hierarchical circuit diagram information.
Some of the computer-aided design (CAD) systems, which perform logical simulation, timing verification, layout, and so forth, on the basis of circuit diagram information, can process only expansive circuit diagram information. In response to hierarchical circuit diagram information stated at a higher level referencing circuit diagram information at a lower level therein, a CAD system converts the hierarchical circuit diagram information into expansive circuit diagram information for processing. Therefore, the CAD system extracts logical data from the hierarchical circuit diagram, expands the extracted logical data, develops a circuit diagram for the expanded logical data, and thereby generates expansive circuit diagram information.
For information on such a method to generate circuit diagrams, reference may be made to Anjali Arya et al., "Automatic Generation of Digital System Schematic Diagrams" in IEEE, 22nd ACM/IEEE Design Automation Conference, 1985, pp. 388-395.
The hierarchical expansion method is intended to generate a circuit diagram in a form as highly readable as possible for its user. However, the circuit diagram thereby generated has a different image from the circuit diagram indicated by the original hierarchical circuit diagram information, and is not sufficiently readable for the user. Especially where circuit diagram information at a lower level of hierarchy which the circuit diagram at a higher level of hierarchy is to reference has a relatively large quantity, the circuit diagram indicated by the expansive circuit diagram information becomes so large that the diagram has to be, split to be displayed. As a result, the user finds it difficult to take an overall look at the diagram.